当工程师写诗：IBM 前资深工程师笔下的 UI 设计之梦

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IEEE Spectrum; Source image: iStock [](mailto:?subject=Poetry%20for%20Engineers%3A%20The%20UI%20Designer%E2%80%99s%20Dream&body=https://spectrum.ieee.org/poetry-user-interface-design) [artificial intelligence](https://spectrum.ieee.org/tag/artificial-intelligence)[type:departments](https://spectrum.ieee.org/tag/type-departments)[user interface](https://spectrum.ieee.org/tag/user-interface)[code](https://spectrum.ieee.org/tag/code)[poetry](https://spectrum.ieee.org/tag/poetry)[verse becomes electric](https://spectrum.ieee.org/tag/verse-becomes-electric) My job is to translate dry and unrelenting code into a user interface of surpassing beauty. With my mouse, I roll one pixel after another up the vast anthill of the internet. My dream is to translate the visions of the holy ones into a communication protocol of universal wonderment. I want to launch shreds of light into the air to fall like a layer of diamonds on the endless mountains of the Web. Don’t imagine these dreams are limited by the LANs of the software lab. Between here and the ultimate unlimited interface of my aspirations lives a dazzling darkness, wide as the universe and thin as a hair. From Your Site Articles * [Poetry for Engineers: Cyborg Laboratory ?](https://spectrum.ieee.org/poetry-for-engineers-cyborg-laboratory) * [Poetry for Engineers: Nine Lives of Nikola Tesla ?](https://spectrum.ieee.org/poetry-for-engineers-nine-lives-of-nikola-tesla) * [Poetry for Engineers: Safe Distance ?](https://spectrum.ieee.org/poetry-for-engineers-safe-distance) Related Articles Around the Web * [Poetry Foundation ?](https://www.poetryfoundation.org/) [artificial intelligence](https://spectrum.ieee.org/tag/artificial-intelligence)[type:departments](https://spectrum.ieee.org/tag/type-departments)[user interface](https://spectrum.ieee.org/tag/user-interface)[code](https://spectrum.ieee.org/tag/code)[poetry](https://spectrum.ieee.org/tag/poetry)[verse becomes electric](https://spectrum.ieee.org/tag/verse-becomes-electric) [Ralph Earle](https://spectrum.ieee.org/u/ralph-earle) joined the IBM Software Lab in Raleigh, N.C., in 1990 as a technical editor and retired as a senior software engineer in 2017. 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Smith](https://spectrum.ieee.org/u/matthew_s_smith) 15 Sep 2026 12 min read [](javascript:;) 14 [](mailto:?subject=The%20AI%20Inference%20Revolution%20Is%20Here&body=https://spectrum.ieee.org/inference-hardware-revolution) Vertical [](https://spectrum.ieee.org/inference-hardware-revolution) DarkBlue1 **Since about 2020,**AI has largely focused on training bigger and better models. Large language models (LLMs) ballooned from millions of parameters to trillions. This proved effective: The largest version of OpenAI’s GPT-3, released in 2020, correctly [answered](https://arxiv.org/pdf/2009.03300) just 43.9 percent of questions on a popular knowledge-and-reasoning benchmark. Just four years later, GPT-4o [reached](https://openai.com/index/gpt-4o-mini-advancing-cost-efficient-intelligence/) a score of 88.7 percent on the same exam, effectively matching those of human experts. Advanced AI labs are still training ever larger models, but that training has somewhat receded to the background of the AI conversation. In 2026, inference—the use of trained models to produce code, write essays, or make images of ourselves as elves—has come to the forefront. “It’s like training is yesterday’s news,” says [Matt Kimball](https://moorinsightsstrategy.com/team/matt-kimball/), principal data-center analyst at Moor Insights & Strategy. “All that any chief information officer wants to talk about is inference.” Nvidia CEO Jensen Huang, speaking at the company’s GTC 2026 conference, touted this change as the “[inflection point of inference](https://www.youtube.com/watch?v=jw_o0xr8MWU).” Part of what’s caused the shift is very simple: LLMs are becoming useful, so people are using them. On top of that, many models on the market today are reasoning models. In response to a user’s query, they run inference not just once but multiple times, reprompting themselves in a process called[_\_chain of thought\__](https://arxiv.org/pdf/2201.11903). Reasoning models generate longer outputs, and models with high reasoning effort can produce up to [20 times](https://www.linkedin.com/posts/artificial-analysis_how-many-tokens-do-reasoning-models-use-vs-activity-7318302119206289408-3mt1/) as much text as those with low or no effort. Adding even more to the world’s inference workload, the rise of [agentic AI](https://spectrum.ieee.org/ai-agents) has resulted in inference running not just as a real-time response to a user’s query but also around the clock, working autonomously toward a user-defined goal. Amazon’s Trainium chip was originally designed for AI training. However, Amazon Web Services chose to break up AI inference into two parts, with Trainium running the more computationally complex portion and Cerebras’s wafer-scale engine taking on the more memory-intensive portion.Amazon The resulting explosion in inference demand has led to unexpected alliances among tech giants. [OpenAI](https://openai.com/index/cerebras-partnership/) and [Amazon](https://www.reuters.com/business/retail-consumer/cerebras-systems-amazon-strike-deal-offer-cerebras-ai-chips-amazons-cloud-2026-03-13/) have deployed chips the size of a [dinner plate](https://spectrum.ieee.org/cerebrass-giant-chip-will-smash-deep-learnings-speed-barrier) designed by [Cerebras](https://www.cerebras.ai/), despite Amazon having its own [Trainium](https://aws.amazon.com/ai/machine-learning/trainium/) chips. Nvidia [bought](https://www.cnbc.com/2025/12/24/nvidia-buying-ai-chip-startup-groq-for-about-20-billion-biggest-deal.html) key talent and intellectual property from AI-inference startup [Groq](https://groq.com/) in a controversial deal worth US $20 billion. And [Anthropic](https://www.anthropic.com/) is [paying](https://x.ai/news/anthropic-compute-partnership) LLM competitor[SpaceXAI](https://x.ai/) over a billion dollars per month to lease spare compute. Although they might seem similar, AI training and AI inference are computationally different. These big moves from tech giants signal that in order to support the inference demand, we’re going to need a very different mix of hardware than experts may have expected even a couple of years ago. ## How does AI inference differ from AI training? An untrained LLM is like a jumble of Scrabble tiles on a table. Instead of single letters, though, the tiles show fragments of words, called tokens. Everything you’d need to write almost anything is present, but nothing makes sense. Training a model organizes this jumble using a guessing game played at scale. The model is shown real text with the next token hidden and asked to predict what comes next. After each guess, the correct token is revealed and then compared to the prediction, and the difference is used to calculate the model’s accuracy. The game is played not with a single sentence but over billions of passages. While a real game of Scrabble can be played over a bag of chips and a few drinks, AI training is computationally intense. The model updates its parameters through [backpropagation](https://spectrum.ieee.org/what-is-deep-learning/backpropagation), a process that repeatedly calculates how each of a model’s billions or trillions of parameters should shift to make the next prediction better. This is why tech giants are [building](https://spectrum.ieee.org/5gw-data-center) larger data centers than ever before. Eventually the model’s creator decides further training isn’t worth the cost, and the guessing game stops. Backpropagation ends, the parameters are frozen, and the LLM becomes a pretrained model. Fine-tuning—a short training run on smaller, more specialized data—adds final tweaks, and the model is deployed. Nvidia’s Groq 3 language-processing unit minimizes data movement by placing on-chip SRAM memory and computational blocks in the order they are needed on-chip. Nvidia Next comes inference. This is the process of using the deployed model, which, now that it’s been trained, has learned to spit out Scrabble tiles—tokens—in a sensible order. You might think that AI inference is less computationally demanding because the backpropagation calculations used to update parameters are eliminated. But [Sudeep Bhoja](https://www.linkedin.com/in/sudeep-bhoja-070a111/), founder and CTO of the inference-hardware company [d-Matrix](https://www.d-matrix.ai/), explains that inference adds new challenges. The models are “autoregressive” in nature. That is, the next output depends on the previous one. “So to generate the next token, you have to read all of the weights and all of the [context] from the previous token,” explains Bhoja. The context includes all of your prompts, all of the LLM’s replies, and all of the files you upload. It’s a lot of data and a lot of processing. An LLM generates its reply in two phases: prefill and decode. Prefill is the model reading a prompt. It processes every token at once, computing how each token relates to all the others. This operation is called [attention](https://en.wikipedia.org/wiki/Attention_(machine_learning)), and it’s a defining characteristic of the transformer architecture behind modern LLMs. It allows them to respond to a word in its sentence, paragraph, and larger context rather than on its own. Think of it like arranging Scrabble tiles before you place them in a game. Many players move tiles around to imagine how they connect. Self-attention plays a similar role, though instead of moving physical tiles, each token sends a query to the others and receives a score indicating the token’s relevance. These queries result in two types of vectors: the keys and values. They are typically placed in a store called the KV cache. This isn’t strictly required, as a model could instead recompute these vectors with each new token it generates. But nearly all LLMs use a KV cache to reduce how much computing they do. The KV cache is stored in memory and becomes a scratchpad to which the LLM can return to understand a conversation, and though it starts small, it can swell to dozens of gigabytes. Prefill is a problem that can be easily divided up and worked on in parallel. This is why GPUs became the dominant AI accelerator as LLMs surged in popularity. Graphics rasterization (computing the color of every pixel on a screen) is also massively parallel, so GPU architectures were a natural fit. Cerebras’s wafer-scale engine chips maximize memory bandwidth by keeping everything—both memory and computational units—side by side on the dinner-plate-size chips. Cerebras Next comes decode. Here, the model generates its reply one token at a time. At each step it takes the most recent token, weighs it against everything in the KV cache, uses that information to predict the next token, and adds the new token’s key and value to the cache. Then it repeats in sequence, token by token. This is where the autoregressive nature of the model works against inference speed. Predicting each token requires reading the entire model from memory, and that model consists of possibly tens to hundreds of gigabytes of parameters (the numbers representing what the model learned in training). Crucially, this is in addition to the memory required to store the KV cache. As a result, the movement of all this data through memory often requires more bandwidth than inference hardware has available. So at least some of the computing parts of a GPU sit idle as it waits for data. Researchers [found](https://arxiv.org/pdf/2503.08311) that Nvidia H100 GPUs running open-source LLMs sit idle 50 to 80 percent of the time. ## Memory’s role in inferencing [Shahriar “Sha” Rabii](https://www.linkedin.com/in/rabii/), former head of silicon engineering at Meta and cofounder of the AI startup [Majestic Labs](https://majestic-labs.ai/), says idled processors are why many companies that are trying to improve AI-inference performance are laser-focused on memory. “With the GPU-based approach, you end up greatly over-provisioning compute and starved on memory. That’s driving the big [memory] scale out,” he says. Bhoja’s d-Matrix and Rabii’s Majestic Labs both focus on this memory bottleneck. However, their companies imagine different solutions. d-Matrix’s second-generation AI accelerator, [Raptor](https://www.d-matrix.ai/announcements/d-matrix-and-alchip-announce-collaboration-on-worlds-first-3d-dram-solution-to-supercharge-ai-inference/), aims to improve inference performance by minimizing the distance between compute and memory. The GPUs in most current AI-inference deployments do this by placing high-bandwidth memory (HBM) around the perimeter of the GPU. Each HBM is a stack of DRAM dies linked together and connected to a superfast interface to the GPU. This is great for training, but for inference, the amount of memory you can stack this way and the bandwidth it can provide leave something to be desired. ### d-Matrix’s stacked-die architecture Memory bandwidth—how quickly data can be read from memory to logic—is a major bottleneck in AI inference. The startup d-Matrix is increasing that bandwidth by stacking the logic die directly on top of the memory, in this case DRAM. This allows for lots of extremely short interconnects. Chris Philpot d-Matrix’s Raptor removes that bottleneck by stacking an AI accelerator on a DRAM die. Instead of stacking memory, d-Matrix stacks memory and compute. Bhoja says this reduces the distance that data must travel to “micrometers instead of millimeters.” Like building a skyscraper, going vertical makes it possible to do more inside the same physical footprint. Majestic takes the opposite approach. Instead of trying to minimize the length that data must travel between compute and memory, the company is focused on improving the memory interface to accommodate longer wire traces while keeping bandwidth high. Longer wires allow Majestic to connect memory stacks that aren’t directly next to the GPU, removing the space limitation of HBM. “A memory interface has a very short physical distance it can operate over. In the case of HBM, it’s up to 2 or 3 millimeters. You have this shoreline around the periphery, which is the only place where you can put HBM,” says Rabii. Majestic [claims](https://www.techradar.com/pro/startup-swaps-costly-ai-gpus-for-arm-cores-and-up-to-128tb-of-cheap-lpddr6-ram-instead-of-expensive-hbm-to-smash-through-the-memory-wall) its memory interface can transmit bits as far as about a meter. That’s achieved with a proprietary copper link and a memory-aggregator chip that coordinates data. “The aggregator is the endpoint for the high-speed interface and a way to fan out to many, many commodity DRAM chips,” says Rabii. Because of this, Majestic can support up to 128 terabytes of DRAM memory in a single server rack—a significant increase over Nvidia’s [GB300 NVL72 rack](https://www.nvidia.com/en-us/data-center/gb300-nvl72/), which has about[20 TB of HBM3E](https://resources.nvidia.com/en-us-blackwell-architecture/blackwell-ultra-datasheet?ncid=no-ncid). ### Majestic Labs’ memory-aggregation architecture Majestic Labs plans to satisfy AI’s memory appetite via a proprietary interconnect and a memory-aggregator chip, allowing a single rack access to up to 128 terabytes of cheap DRAM memory. Chris Philpot d-Matrix and Majestic have one thing in common: Instead of HBM, they both use off-the-shelf DRAM. This is the most common type of computer memory in the world; it’s in everything from smartphones to cars. Memory analyst [Jim Handy](https://thememoryguy.com/) says HBM costs two to three times as much as DRAM. d-Matrix and Majestic chose DRAM in part because of this price advantage. However, the proponents of HBM, which include memory giants like [Samsung](https://www.samsung.com/us/) and [SK Hynix](https://www.skhynix.com/), aren’t sitting idle. HBM4, the latest version of HBM memory, is now in production and will be used by [Nvidia’s Vera Rubin GPU](https://spectrum.ieee.org/nvidia-rubin-networking), which is expected to ship in the second half of 2026. [Hoshik Kim](https://www.linkedin.com/in/hoshikk/), head of memory-systems research at [SK Hynix](https://www.skhynix.com/), says HBM4 “will decisively break the memory bottlenecks constraining AI inference today” by doubling HBM’s maximum memory bandwidth and increasing the amount of HBM memory per stack. ## Combining chips for faster inference The big players—Nvidia and Amazon—are going for an all-chips-on-deck approach. Nvidia’s GPUs and Amazon’s Trainium training accelerators are still great for part of the inference workload: the prefill stage, where all the context keys and values are calculated. But to accelerate decode, the part where new tokens are generated, they are looking to new, memory-centric architectures from smaller players. In Nvidia’s case, the smaller player was Groq (not to be confused with Grok, the family of LLMs trained by SpaceXAI). Nvidia purchased intellectual property and hired talent from Groq at the end of 2025, and just three months later at the Nvidia’s GTC 2026 conference, Jensen Huang [unveiled](https://spectrum.ieee.org/nvidia-groq-3) the Nvidia Groq 3 language-processing unit ([LPU](https://www.nvidia.com/en-us/data-center/lpx/)). Groq’s architecture relies on memory—in its case, SRAM—built directly into the chip’s architecture. Unless you’re a chip architect, or a [hardcore PC gamer,](https://www.pcworld.com/article/2634140/why-i-care-about-cpu-cache-as-a-pc-gamer-the-obscure-spec-explained.html) you probably never give SRAM a thought. SRAM has the benefit of being tightly integrated into a compute chip’s architecture—it’s on the same piece of silicon as the processor—and has the drawback of being less dense and more expensive than DRAM. Most chips include only a few dozen megabytes of SRAM. AI inference, however, has ignited new interest in SRAM as a means of bringing the model weights stored in memory closer to compute. [Ian Buck](https://www.linkedin.com/in/ian-buck-19201315/), vice-president and general manager of hyperscale and high-performance computing at [Nvidia](https://blogs.nvidia.com/blog/author/ian-buck/), says the LPU has a much different set of priorities than the company’s GPUs. The LPU has far less raw computing power than a standard GPU, but it gains 500 megabytes of on-die SRAM connected directly to its floating-point math units. “The benefit is the memory bandwidth. The LPU has seven times the memory bandwidth of the GPU,” he says. Between the Rubin GPU and the Groq LPU, prefill and decode can both be accelerated to get the best of both worlds, the theory goes. “We do all the attention math and context processing on the Vera Rubin [GPU] rack,” explains Buck. “For all the expert calculations…the matrix multiplications, we do that part on the LPU.” The company packs 256 LPUs into the Groq 3 LPX, a system the size of a data-center rack. ### Nvidia’s two-chip approach to inference Nvidia also plans to split the inference workload across two chips. The company’s newest Rubin GPUs will tackle the compute-intensive prefill phase, while the Groq 3 language-processing unit (LPU), with lots of on-chip SRAM, will handle the memory-intensive decode phase. Chris Philpot Amazon Web Services (AWS), for its part, struck a [deal](https://www.aboutamazon.com/news/aws/aws-cerebras-ai-inference) with [Cerebras](https://spectrum.ieee.org/tag/cerebras), to pair the Trainium accelerator with [Cerebras’s Wafer-Scale Engine 3 (WSE-3)](https://www.cerebras.ai/chip). Cerebras takes a similar approach to Groq, though at a much larger scale. WSE-3 turns an entire silicon wafer into a single chip that contains over 4 trillion transistors. The design doesn’t connect to external memory but instead etches 44 gigabytes of SRAM into each wafer. “We store the [model] weights on the SRAM,” says [James Wang](https://www.linkedin.com/in/james-wang-5166575/), formerly director of product marketing at Cerebras who has since moved to SpaceXAI. “So that’s easily 40 to up to 80 billion parameters that we can support on one chip.” Amazon plans to use AWS Trainium chips for prefill, and Cerebras for decode. But Cerebras’s chips can also go it alone in inference. WSE-3 was [deployed by OpenAI to power GPT-5.3-Codex-Spark](https://openai.com/index/introducing-gpt-5-3-codex-spark/), a variant of the company’s coding mode, outputting over 1,000 tokens per second. For comparison, OpenAI’s standard GPT-5.4 deployment outputs 50 to 125 tokens per second. ### Amazon Web Services’ two-chip inference strategy Amazon Web Services combined their Trainium chips with Cerebras’s dinner-plate-sized wafer-scale engine (WSE) to tackle different parts of AI inference. Trainium chips handle the computationally intensive prefill phase, while the WSE, with interleaved on-chip SRAM memory, handles the memory-bandwidth-limited decode phase. Chris Philpot Cerebras can also tackle prefill without moving the workload to different specialized chips. For this, it networks together multiple WSE-3 chips to form a single pool of memory. Cerebras has demonstrated it can serve models with up to 1T parameters, such as [Moonshot](https://spectrum.ieee.org/tag/moonshot) AI’s Kimi 2.6, though Wang says “the architecture has no innate limitation in terms of how many parameters it will do.” Despite these differences in strategy, Nvidia and AWS seem to agree that the future of AI inference will be solved by a systems approach that pools different kinds of chips together to tackle the largest LLMs. Or, as Buck says: “To do modern AI inference, you need all the chips.” ## Learning to do more with less (bits) Nvidia became the world’s most valuable tech company because it designed the world’s most desired GPUs. But not all of the attention is focused on improving AI-inference hardware. AI researchers are also learning how to optimize LLM software and hardware in tandem to make the best use of the memory and compute components. Most computers store numbers in a 32-bit or 64-bit format. These determine how many bits are available to represent a single number. If too few bits are available, the number can’t be stored without losing information. The quality of an LLM benefits from more-precise number formats, but this creates a problem for inference performance. More-precise numbers aren’t free. The bits that describe them take up more space in memory and require more silicon and energy to compute. [Gilles Backhus](https://www.linkedin.com/in/gillesbackhus/?originalSubdomain=de), cofounder of the AI-accelerator company [Tensordyne](https://www.tensordyne.ai/), says this creates a tension between model size and number precision. “Would you prefer a model that is size _x_ but runs in 8-bit, or would you prefer a model that is twice the size but runs in 4-bit?” The size of each model will be roughly the same in terms of memory and compute, “but the 4-bit approach gives you twice as many synapses, if you will. And people are figuring out that [the 4-bit approach] is worth it.” The process of converting an LLM from a more-precise number format to a less-precise format is called [quantization](https://spectrum.ieee.org/1-bit-llm), and it’s been in use for several years. However, researchers are finding new ways to quantize models down while retaining a large majority of the model’s quality. Nvidia recently created a new 4-bit number format, [NVFP4](https://developer.nvidia.com/blog/introducing-nvfp4-for-efficient-and-accurate-low-precision-inference/), for this purpose. [AMD](https://www.amd.com/en.html), [Intel](https://www.intel.com/content/www/us/en/homepage.html), and [Qualcomm](https://www.qualcomm.com/) have instead rallied around a competing 4-bit number format called [MXFP4](https://huggingface.co/blog/RakshitAralimatti/learn-ai-with-me) that Nvidia also contributed to developing. “It’s the black art of AI,” says Buck, of Nvidia. When Nvidia quantized DeepSeek-R1 from FP8 to NVFP4, scores on seven major benchmarks degraded by less than one percent while [performance improved by three times](https://developer.nvidia.com/blog/3-ways-nvfp4-accelerates-ai-training-and-inference/), the company says. Quantization is likely just the tip of the spear, as AI researchers and startups are investigating a diversity of opportunities for optimization, some of which could dramatically change the silicon found in AI-inference hardware. Tensordyne’s unique approach to AI inference combines a logarithmic number format with bespoke hardware in the company’s Napier chip. Tensordyne Tensordyne is expected to [accelerate](https://spectrum.ieee.org/tensordyne-inference-claim) AI inference with a logarithmic number system that leans on a property of logarithms: The log of A times B equals the log of A plus the log of B. So, storing numbers as their exponents lets the chip add where it would otherwise multiply. That matters in silicon because multiplier circuits draw more power and use more die area than adders do. Tensordyne says its rack-scale hardware, called Napier, can produce up to 1,300 tokens per second per user, and can do so while using less than a [tenth](https://www.tensordyne.ai/stories/tensordyne-announces-breakthrough-inference-system-to-end-ais-speed-vs-cost-trade-off) as much power as comparable Nvidia hardware. [Etched](https://www.etched.com/), a startup based in San Jose, Calif., is even designing AI accelerators that translate the transformer architecture used by LLMs directly into silicon. Rather than building general-purpose GPUs, the company is wiring up the connections needed for efficient transformer calculations into its chip, making the chip much less flexible but more efficient for the tasks most performed by current LLMs. The company says its first AI accelerator, [Sohu](https://www.spheron.network/blog/etched-ai-sohu-vs-nvidia-transformer-asic-inference/), can run Meta’s [Llama](https://spectrum.ieee.org/tag/llama) 70B model at a stunning 500,000 tokens per second, though this approach also means it won’t be able to run LLMs that move away from a typical transformer architecture. Whether these ideas will prove fruitful remains to be seen. Etched just [shipped](https://www.etched.com/progress/from-zero-to-one) their first rack in August. Tensordyne believes its first hardware will be available in 2027. Even so, these startups show how the demand for inference performance is fueling unconventional ideas. ## Inference is everyone’s game The sheer variety of approaches to AI-inference acceleration—stacking compute on memory, extending interfaces from millimeters to meters, using an entire silicon wafer for SRAM, squeezing models into 4 bits—raises a question: Which is going to win, and which is going to lose? But that’s likely not the right question, experts say. The demand for AI is currently insatiable, and while fears of an AI bubble stalk the industry, it has yet to hamper growth. On the contrary, Kimball of Moor Insights & Strategy thinks inference could drive intense demand for AI hardware in the long term, because it’s not obvious where that demand will end. “You could add a million agents into your organization,” he says. “These things work 24 hours a day; they don’t go home at five at night like we do.” If AI inference remains as desirable as Kimball expects, the evolution is likely to follow the same trajectory as the CPU. The CPU didn’t improve along a single axis but instead across [multiple fronts](https://spectrum.ieee.org/intel-i860) simultaneously. Once transistor scaling slowed, chip and system architecture innovations of all kinds proliferated. The list of individual innovations that led to today’s ubiquitous, powerful personal compute could fill dozens of books. A few decades from now, the history of AI inference innovation will show similar depth. From Your Site Articles * [With Nvidia Groq 3, the Era of AI Inference Is (Probably) Here ?](https://spectrum.ieee.org/nvidia-groq-3) * [AI Inference Competition Heats Up ?](https://spectrum.ieee.org/new-inference-chips) Related Articles Around the Web * [Ultimate Guide – The Best and Fastest AI Inference Engines of 2026 - SiliconFlow ?](https://www.siliconflow.com/articles/the-fastest-ai-inference-engine) * [LLM Inference Hardware: Emerging from Nvidia's Shadow ?](https://gradientflow.substack.com/p/llm-inference-hardware-emerging-from) Keep Reading ↓ {"imageShortcodeIds":[]} [Robotics](https://spectrum.ieee.org/topic/robotics/)[AI](https://spectrum.ieee.org/topic/artificial-intelligence/)[Computing](https://spectrum.ieee.org/topic/computing/)[Humanoid Robots](https://spectrum.ieee.org/topic/robotics/humanoid-robots/)[Sponsored Article](https://spectrum.ieee.org/type/sponsored/) ## [Rethinking Robot Safety in the Age of AI](https://spectrum.ieee.org/physical-ai-robot-cybersecurity-vicone) ### How to secure today’s AI robots against stealth cyber threats [VicOne](https://spectrum.ieee.org/u/vicone-) [VicOne](https://vicone.com/) is a Physical AI cybersecurity company protecting vehicles and robots from cyber threats that can alter behavior and compromise safety. Headquartered in Tokyo, Japan, the company provides automotive and robotics organizations with software and services to identify cyber risks early, assess their potential safety impact, and protect systems in operation, helping maintain safe, reliable behavior across real-world deployments. 16 Sep 2026 4 min read [](javascript:;) 3 [](https://spectrum.ieee.org/physical-ai-robot-cybersecurity-vicone) Cyberattacks can change how robots act without obvious signs of failure, requiring a new approach to safety that combines AI model and vulnerability scanning, simulation-based validation, and continuous monitoring to help secure robots from development through operation. VicOne [](mailto:?subject=Rethinking%20Robot%20Safety%20in%20the%20Age%20of%20AI&body=https://spectrum.ieee.org/physical-ai-robot-cybersecurity-vicone) _This article is brought to you by [VicOne](https://vicone.com/?utm\_source=ieee-spectrum&utm\_medium=sponsored-content&utm\_campaign=2026-09)._ Robot safety has traditionally asked: Can a machine remain safe when something goes wrong? Physical AI raises a harder question: Can a machine remain safe when an attacker changes what it sees, decides, or does even when nothing appears to have failed? As AI and robotics continue to advance at an unprecedented pace, modern robots perceive through multimodal sensors, interpret context using [AI models](https://spectrum.ieee.org/tag/ai-models), and translate those interpretations into physical action. As they move into dynamic environments, their safety increasingly depends on the integrity of the data guiding their decisions. That dependence creates risks that conventional safety assessments may not fully capture. Recent research has demonstrated that manipulating what a robot sees, hears, or interprets can influence its behavior without requiring direct control. Such manipulation can occur anywhere across its complex sensing and decision-making system — a layered attack surface encompassing training pipelines, system infrastructure, and runtime perception. ## Layer One: Corrupting intelligence at its source In 2017, [BadNets](https://arxiv.org/abs/1708.06733) demonstrated that a model could behave normally under most conditions, yet fail in the presence of a specific hidden trigger. In one example, a subtle pattern caused a stop sign to be misclassified as a speed limit sign without affecting the model’s behavior on other inputs. What began as a classification vulnerability has since evolved into action manipulation. At [NeurIPS](https://spectrum.ieee.org/tag/neurips) 2025, researchers introduced [BadVLA](https://arxiv.org/abs/2505.16640)a backdoor attack targeting Vision-Language-Action (VLA) models that allow robots to see, interpret instructions, and produce coordinated physical movement. Rather than altering a single label, the attack caused conditional deviations in the robot’s action trajectory when a trigger was present. Without the trigger, the model largely preserved normal task performance, while the backdoor remained effective under task transfers and model fine-tuning. A related study in 2025, [GoBA](https://arxiv.org/abs/2510.09269), showed that ordinary objects such as a coffee mug could serve as a reliable trigger. The researchers reported a 97 percent attack success rate without degrading performance on clean inputs. A critical safety question today is whether Physical AI models remain within their task and safety boundaries under adversarial conditions. These studies expose a blind spot in model validation: A model may pass testing yet produce corrupted behavior when a hidden trigger appears in operation. So a critical safety question today is whether Physical AI models remain within their task and safety boundaries under adversarial conditions. [Simulation tools](https://vicone.com/company/press-releases/vicone-turns-def-con-34-robot-hacking-research-into-free-nvidia-isaac-sim-extension?utm_source=ieee-spectrum&utm_medium=sponsored-content&utm_campaign=2026-09) such as [NVIDIA](https://spectrum.ieee.org/tag/nvidia) Isaac Sim, when paired with [VicOne Radeis](https://vicone.com/products/radeis?utm_source=ieee-spectrum&utm_medium=sponsored-content&utm_campaign=2026-09), can test the effects of manipulated inputs before deployment. VicOne LAB R7 demonstrates Radeis, a Physical [AI safety](https://spectrum.ieee.org/tag/ai-safety) validator for NVIDIA Isaac Sim that tests how adversarial visual inputs affect robot behavior before deployment.VicOne ## Layer Two: System vulnerabilities as gateways to AI control Even a securely trained model can be subverted if the surrounding system stack is vulnerable. In September 2025, researchers disclosed [UniPwn](https://github.com/Bin4ry/UniPwn), a Bluetooth [exploit chain affecting quadruped and humanoid robots](https://spectrum.ieee.org/unitree-robot-exploit) from a major manufacturer. Hardcoded cryptographic keys allowed traffic decryption, authentication checks were bypassed, and command injection enabled root-level execution. The exploit is also described as “wormable.” A compromised robot could scan nearby units and potentially affect an entire fleet. VicOne Lab R7’s demo shows how chaining three wireless exploits can trigger uncontrolled robot behavior within 60 seconds, resulting in operational disruption.VicOne Middleware creates another exposure point. Vulnerabilities in [ROS 2](https://www.ros.org/) and DDS-based systems can enable arbitrary code execution or abuse unauthenticated topics to deliver malicious commands. With sufficient access, an attacker could override motor commands or replace AI model weights without directly attacking the model architecture. In this case, the components may still function as designed. What has changed is the trustworthiness of the commands flowing through the system. Vulnerability management can help teams identify known risks before deployment, while continuous monitoring can surface emerging threats. ## Layer Three: Manipulating perception and reasoning at runtime At runtime, manipulating inputs that shape perception or reasoning may require neither firmware modification nor a network breach. In 2024, [RoboPAIR](https://robopair.org/)demonstrated how carefully structured prompts could redirect LLM-controlled robots into unsafe trajectories. [BadRobot](https://arxiv.org/abs/2407.20242)exposed a deeper architectural weakness: in several cases, a robot verbally refused a dangerous command while its motion controller executed the action anyway. Vision-based manipulation is equally powerful. [VLAttack](https://arxiv.org/abs/2411.13587)showed that an adversarial patch within the camera’s view could reduce a VLA model’s task success rate to zero. [FreezeVLA](https://arxiv.org/abs/2509.19870)showed that a single adversarial image could freeze a robot’s decision-making loop, making it unresponsive to subsequent instructions. Runtime assurance must therefore look beyond whether individual components remain available and assess whether cyber events are beginning to affect physical behavior. In each case, the camera may still work, the model may still run, and the controller may still respond. Yet the resulting behavior can be unsafe because the robot is acting on manipulated perception or reasoning. Runtime assurance must therefore look beyond whether individual components remain available and assess whether cyber events are beginning to affect physical behavior. Security event correlation, behavioral-impact assessment, and policy-bounded response supported by edge AI, can help contain the affected path without unnecessarily stopping the entire robot fleet. ## From point-in-time safety to lifecycle assurance The risks across these three layers reveal the missing layer in robot safety assurance: [cybersecurity](https://spectrum.ieee.org/tag/cybersecurity). Functional safety addresses failures and unexpected operating conditions; cybersecurity extends that assurance to deliberate manipulation, including attacks that may leave the underlying system apparently functional. This requires assurance across the robot’s lifecycle. During design, teams need to understand which cyber risks could invalidate assumptions behind intended behavior. Before deployment, they should test whether realistic attacks can cause a robot to deviate from its task or safety boundaries. In operation, monitoring should identify whether cyber events are beginning to affect behavior, contain the affected path, and preserve safe operation where possible. VicOne’s lifecycle approach combines AI model and vulnerability scanning, simulation-based validation, and continuous monitoring to help secure robots from development through operation.VicOne While cybersecurity does not replace functional safety, it helps ensure that Physical AI remains within acceptable boundaries even when what it sees, decides, or does is under attack. For a deeper look at the cybersecurity risks and defense strategies shaping autonomous robotics, download our whitepaper “[Securing the Rise of AI Robots: Cyber Risks, Real-World Threats, and Defense Strategies](https://info.vicone.com/ai-robotics-security-risk-whitepaper?utm_source=ieee-spectrum&utm_medium=sponsored-content&utm_campaign=2026-09).” Keep Reading ↓ {"imageShortcodeIds":[]} [Energy](https://spectrum.ieee.org/topic/energy/)[Whitepaper](https://spectrum.ieee.org/type/whitepaper/) ## [Engineering the Substation Exit for Reliability, Capacity, and Expansion](https://content.knowledgehub.wiley.com/aerial-cable-systems-for-substation-exit-construction/) ### Learn why the substation exit is a high-consequence point on the grid, and how covered spacer-cable construction can reduce contact-driven faults while supporting future feeders [Marmon Utility (Hendrix?)](https://spectrum.ieee.org/u/marmonutility-hendrix-r) [Marmon Utility LLC](https://marmonutility.com/) has more than 200 years of experience in the design, engineering, installation, manufacturing, and service of power cable, spacer cable systems, and polymer insulators. Our work strengthens and supports the electric power infrastructure of countries around the world. With our trusted brands, commitment to service, and relentless innovation, we’ve got what the utility industry needs to succeed. It’s our passion to support your work. 24 Sep 2026 1 min read [](javascript:;) [](mailto:?subject=Engineering%20the%20Substation%20Exit%20for%20Reliability%2C%20Capacity%2C%20and%20Expansion&body=https://spectrum.ieee.org/engineering-the-substation-exit-for-reliability-capacity-and-expansion) This white paper gives distribution engineers and utility teams a practical overview of the substation exit, the short and high-consequence section where station capacity divides into individual feeders. It explains how covered, spacer-supported overhead construction can reduce common contact-driven faults while leaving room for future circuits. **What you will learn about:** * Why a fault near the substation exposes more customers than one farther along the feeder, and why the first spans out of the station carry so much reliability weight. * How covered conductors and spacer-cable systems differ from bare overhead conductors, and why covered conductor is not treated as touch-safe insulation. * Which engineering factors shape a sound exit design, including conductor rating, protection coordination, grounding, and structural loading. * How overhead spacer cable compares with conventional bare overhead and underground shielded cable across footprint, reliability, and lifecycle cost. * How to move a project from concept to commissioning using staged design gates and a clear performance specification. [Download this free whitepaper now!](https://content.knowledgehub.wiley.com/aerial-cable-systems-for-substation-exit-construction/) Keep Reading ↓ [Telecommunications](https://spectrum.ieee.org/topic/telecommunications/)[Guest Article](https://spectrum.ieee.org/type/guest-article/) ## [Social Media Bans Aren’t Enough to Make Children Safe](https://spectrum.ieee.org/social-media-bans) ### Online child safety deserves more nuanced policy [Danica Radovanovi?](https://spectrum.ieee.org/u/danica-radovanovic) [Danica Radovanovi?](https://digitalserendipities.substack.com/) is a writer and digital society expert based in Germany. Her work engages global policy and digital inclusion projects across the Global North and South, including service as an expert on Child Online Protection for the United Nations’ International Telecommunication Union. She is Senior Researcher at the Leibniz Institute for the Social Sciences and a former scholar at the University of North Carolina at Chapel Hill and the Oxford Internet Institute. She is the editor and contributing author of _Digital Literacy and Inclusion: Stories, Platforms, Communities_ (Springer, 2024), and her work bridges scholarship, policy, and public writing at the intersection of technology and society. Beyond policy and research, Radovanovi? writes fiction and poetry. Her short stories have appeared in literary anthologies. She is the author of the short story collection _Divertimento for Four Seasons_ and is completing her first novel, _Counterpoint_. For more, visit [https://danicar.info](https://danicar.info/) or her Substack, _Digital Serendipities:_[https://digitalserendipities.substack.com](https://digitalserendipities.substack.com/) 25 Sep 2026 5 min read [](javascript:;) 1 [](https://spectrum.ieee.org/social-media-bans) Age-based bans are an incomplete solution to social media problems. Imen Ben Youssef/Hans Lucas/AFP/Getty Images [](mailto:?subject=Social%20Media%20Bans%20Aren%E2%80%99t%20Enough%20to%20Make%20Children%20Safe&body=https://spectrum.ieee.org/social-media-bans) [social media](https://spectrum.ieee.org/tag/social-media)[digital literacy](https://spectrum.ieee.org/tag/digital-literacy)[data protection](https://spectrum.ieee.org/tag/data-protection)[personal data](https://spectrum.ieee.org/tag/personal-data) Even before France approved legislation banning social media for children under 15 last January, 13-year-old Benjamin was already wondering what life without social media would look like. “If we want to play football, we won’t be able to organize it. What will we do? Send letters instead?” he joked in [an interview for _Le Monde_.](https://www.lemonde.fr/en/pixels/article/2026/02/18/teens-on-france-s-social-media-ban-for-under-15s-we-re-going-back-to-the-stone-age_6750597_13.html) His reaction captured the central challenge behind the growing wave of youth social media bans: Removing access is one thing; understanding what those platforms mean in children’s lives is another. Within weeks of Australia’s similar [ban](https://www.legislation.gov.au/C2024A00127/asmade/details), the country’s [eSafety Commissioner reported](https://www.esafety.gov.au/newsroom/media-releases/platforms-restrict-access-to-47-million-under-16-accounts-across-australia) that platforms had restricted access to 4.7 million under-16 accounts. Two months later, though, [one in five Australian teenagers](https://www.rnz.co.nz/news/world/589514/one-fifth-of-australian-teens-still-use-tiktok-snapchat-after-social-media-ban) under 16 was still using TikTok and Snapchat, according to a parental-control data company. But even if all children’s social media accounts were to disappear, do such bans actually make children safer online? [Governments are moving ahead](https://spectrum.ieee.org/countries-seek-to-curb-social-media-addiction-for-kids) without answering that question as they follow Australia’s lead. [Indonesia’s child-safety framework, which took effect in March,](https://www.scmp.com/news/asia/southeast-asia/article/3348232/indonesia-begins-social-media-ban-children-under-16) bars children under 16 from holding accounts on “high-risk” platforms. The U.K. government has announced [plans](https://www.hngn.com/articles/272094/20260715/uk-proposes-midnight-social-media-curfew-16-17-year-olds-ahead-under-16-ban-rollout.htm) to ban social media for under-16s, add default overnight social media curfews for 16- and 17-year-olds, and extend child-safety rules to cover risky AI features. And on 17 September, the European Commission [proposed the EU KIDS Act](https://digital-strategy.ec.europa.eu/en/news/eu-kids-act-restrict-social-media-platforms-access-children-eu), which would bar children under 13 from social media, set 15 as the EU-wide minimum age for opening an account independently, and require platforms to show that their services are age appropriate and safe by design. But based on my experience working on [Child Online Protection initiatives](https://www.itu.int/en/ITU-D/Cybersecurity/Pages/COP/COP.aspx) with the International Telecommunication Union (ITU) across Southeast Asia and the Pacific, I know the bans don’t address the real problems. Instead, we should be paying more attention to [the systems that generate harm](https://spectrum.ieee.org/social-media-trial) in the first place—namely, recommender algorithms, engagement-maximizing design, opaque moderation, and extractive data practices. ## Account removals are not the same as online child safety My experience working on protecting children’s online safety has taught me three main lessons: First, the public institutions responsible for child online protection often lack the staff, budget, or technical capacity to enforce complex online safety policies. Indonesia is illustrative. A[2026 UNICEF evaluation](https://www.unicef.org/indonesia/child-protection/reports/evaluation-programme-prevent-respond-online-child-sexual-exploitation-abuse-ocsea) found capacity constraints among service providers, long-term funding uncertainty, and a need for specialized personnel. At the local level, some staff lacked digital skills, while budget constraints left some areas reliant on external support. Second, many children, and often their parents, lack the digital literacy and critical thinking skills needed to navigate online risks safely. My policy research on child online protection in Indonesia, [published earlier this year in _Digital Society_](https://link.springer.com/article/10.1007/s44206-025-00244-0), found substantial gaps that account removals cannot repair: Many children lacked guidance on navigating the internet safely, and large numbers did not know how to report harmful experiences. And third, the platforms have limited independent oversight as they identify underage users, design age-verification systems, and report their own compliance. In Indonesia, platforms themselves are responsible for carrying out age verification, while the Ministry of Communication and Digital Affairs [oversees compliance](https://www.komdigi.go.id/berita/siaran-pers/detail/lindungi-anak-di-era-digital-kemkomdigi-wajibkan-verifikasi-usia-di-platform-digital). TikTok’s appeals process for users flagged as underage, for instance, can require a [government-issued ID and selfies](https://www.tiktok.com/support/faq_detail?id=7611808266502560268&category=web_account), which is a problem because it involves collecting the additional personal data on an ID card, beyond that needed to confirm age. Will government regulators ensure that TikTok handles that data responsibly? ## The privacy paradox of proving age Every age-based ban creates an engineering problem: How can a platform reliably determine that a user is old enough, without intruding on other information? Governments and companies may use identity documents, parental authorization, app-store checks, or facial age estimation. Each approach has trade-offs among accuracy, privacy, accessibility, and resistance to circumvention. There are also technical issues. One tool, [facial age estimation](https://www.identt.pl/en/blog/age-verification-vs-age-estimation-key-differences-and-best-use-cases/), draws on enormous databases but it is probabilistic, not exact, because people vary so much. It’s also been shown to misclassify both children and adults. The challenge should not merely be to “verify age.” It should be to prove that someone is above a threshold, without disclosing their identity, birth date, or other information third parties might use to create a marketing profile. [The European Commission’s age-verification blueprint](https://digital-strategy.ec.europa.eu/en/factpages/blueprint-age-verification-solution-help-protect-minors-online) challenges companies to verify ages without collecting all that additional information. Privacy-preserving technologies offer promising ways to achieve this. [Zero-Knowledge Proofs (ZKPs)](https://standards.ieee.org/beyond-standards/trends-in-online-age-verification-for-2026/) can confirm that someone meets an age threshold without revealing their identity or exact date of birth. [W3C Verifiable Credentials](https://www.w3.org/TR/vc-data-model-2.0/) are cryptographically verifiable digital claims that can disclose only the information needed, such as “over 16.” And [device-based age signals](https://www.technologyreview.com/2026/03/09/1132352/the-usability-imperative-for-securing-digital-asset-devices/) can allow a phone or app store to share an age range without revealing a user’s exact birth date. But these methods still require rigorous security testing, common standards, independent oversight, and clear limits on data retention. Otherwise, poorly designed [child-safety policies](https://spectrum.ieee.org/age-verification) risk creating permanent identity infrastructures in which businesses, not people, control personal data. ## Where connection goes when a platform closes Blocking access to a platform redirects some young people, but not always where expected. Early anecdotal reports in Australia pointed to teenagers migrating to smaller, less-regulated platforms like Yope, a pattern the [Cato Institute](https://www.cato.org/blog/australias-under-16-social-media-ban-warning-online-speech-security-around-wor